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A Prospective Rank Test of a Detector-Error-Model Weight Screen for Circuit-Level qLDPC Decoding
ID:88 View protection:Participant Only Updated time:2026-10-04 23:37:29 Views:58 Poster Presentation

Start Time:2026-10-12 08:02

Duration:1min

Session:[OP] Poster [P] Poster

Abstract
Circuit-level Monte Carlo labels are costly to obtain when comparing quantum low-density parity-check (qLDPC) code-circuit-decoder instances. We test, prospectively, whether a label-independent detector-error-model (DEM) structure quantity preserves useful ordinal information about logical-block error rate (LER). The frozen bank contains 32 instances with five overlapping construction labels. A fail-closed two-phase search resolved the upper-bound screen d_upper for 24 instances and abstained on eight. Four published bivariate-bicycle anchors were reserved for development, leaving 22 screen-resolved instances in a 28-instance confirmatory population. All 32 instances then received 20,000 fresh circuit-level BP+OSD samples at one fixed operating point, for 640,000 shots. An empirical LER pair is ordered only when its Wilson intervals do not overlap. On the 22 eligible confirmatory instances, C=0.7544 across 226 ordered pairs, with a code-resampling 95% stability interval of [0.6262,0.8382]; the predeclared positive criterion is therefore met. The result supports coarse instance ranking at the tested operating point.
Keywords
quantum LDPC codes,detector error models,BP+OSD decoding,rank validation,prospective testing
Speaker
Quy Pham X.
Post and Telecommunications Institute Of Technology

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Important Dates
  • Conference date

    10-11

    2026

    -

    10-14

    2026

  • 12-30 2025

    Presentation submission deadline

  • 09-28 2026

    Early Bird Registration

  • 10-14 2026

    Draft paper submission deadline

  • 10-15 2026

    Registration deadline

Sponsored By

United Societies of Science

Organized By

Posts and Telecommunications Institute of Technology

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